<?xml version="1.0" encoding="UTF-8"?><rss version="2.0"
	xmlns:content="http://purl.org/rss/1.0/modules/content/"
	xmlns:dc="http://purl.org/dc/elements/1.1/"
	xmlns:atom="http://www.w3.org/2005/Atom"
	>
<channel>
	<title>Comments on: Branchless Code</title>
	<atom:link href="http://www.cod3r.com/2007/03/branchless-code/feed/" rel="self" type="application/rss+xml" />
	<link>http://www.cod3r.com/2007/03/branchless-code/</link>
	<description>General things I find interesting</description>
	<pubDate>Thu, 21 Aug 2008 19:54:37 +0000</pubDate>
	<generator>http://wordpress.org/?v=2.5.1</generator>
		<item>
		<title>By: Graham Booker</title>
		<link>http://www.cod3r.com/2007/03/branchless-code/#comment-11785</link>
		<dc:creator>Graham Booker</dc:creator>
		<pubDate>Sat, 03 May 2008 15:17:26 +0000</pubDate>
		<guid isPermaLink="false">http://www.cod3r.com/2007/03/branchless-code/#comment-11785</guid>
		<description>Eh, computing an address for a jump is really not much different from a branch.  However, processors have branch prediction logic, so changing a branch to an address computation and a jump could potentially be much worse than a branch.  The only case where such a change won't cause a pipeline stall is when the address is computed well beforehand, in which case the branch wouldn't stall either.

There are actually no jumps in the code I mentioned above.  It is essentially computing both paths from a branch, and then using boolean logic to determine which result is committed, and which is thrown away.</description>
		<content:encoded><![CDATA[<p>Eh, computing an address for a jump is really not much different from a branch.  However, processors have branch prediction logic, so changing a branch to an address computation and a jump could potentially be much worse than a branch.  The only case where such a change won&#8217;t cause a pipeline stall is when the address is computed well beforehand, in which case the branch wouldn&#8217;t stall either.</p>
<p>There are actually no jumps in the code I mentioned above.  It is essentially computing both paths from a branch, and then using boolean logic to determine which result is committed, and which is thrown away.</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: Greg Davies</title>
		<link>http://www.cod3r.com/2007/03/branchless-code/#comment-11777</link>
		<dc:creator>Greg Davies</dc:creator>
		<pubDate>Sat, 03 May 2008 13:58:47 +0000</pubDate>
		<guid isPermaLink="false">http://www.cod3r.com/2007/03/branchless-code/#comment-11777</guid>
		<description>I heard something about branchless programming before, but it was explained differently to me. Basically, boolean logic was altered by the compiler and linker to compute the address to jump to. That way you never do a comparison at all, just an unconditional jump.</description>
		<content:encoded><![CDATA[<p>I heard something about branchless programming before, but it was explained differently to me. Basically, boolean logic was altered by the compiler and linker to compute the address to jump to. That way you never do a comparison at all, just an unconditional jump.</p>
]]></content:encoded>
	</item>
	<item>
		<title>By: Alan Humpherys</title>
		<link>http://www.cod3r.com/2007/03/branchless-code/#comment-355</link>
		<dc:creator>Alan Humpherys</dc:creator>
		<pubDate>Thu, 22 Mar 2007 17:19:56 +0000</pubDate>
		<guid isPermaLink="false">http://www.cod3r.com/2007/03/branchless-code/#comment-355</guid>
		<description>The best place to implement this is within the hardware itself.  The CPU designs I worked on at Amdahl in the late 80's had this implemented in hardware.  There were limitations, but we had a 6 stage execution pipeline where there were duplicates of registers and Arithmetic Units for 3 stages which gave sufficient time for the original conditional expression to complete evaluation so that the correct branch/nobranch sequence could be followed.

As with all good things we did in the "dinosaur Mainframe" era, they will be "rediscovered" and put into a PC and the world will be amazed....

Virtualization...  Been there - done that - 1986

 (And we did it so well that the CIA approved our computers to run top level security clearance programs in one virtual mainframe, while potentially hostile code (obtained from inteligence operations) could be run in another virtual mainframe, and the 2 were guaranteed not to be able to interfere with each other...  Something not even remotely possible on the pathetic PC hardware we are dealing with today.)</description>
		<content:encoded><![CDATA[<p>The best place to implement this is within the hardware itself.  The CPU designs I worked on at Amdahl in the late 80&#8217;s had this implemented in hardware.  There were limitations, but we had a 6 stage execution pipeline where there were duplicates of registers and Arithmetic Units for 3 stages which gave sufficient time for the original conditional expression to complete evaluation so that the correct branch/nobranch sequence could be followed.</p>
<p>As with all good things we did in the &#8220;dinosaur Mainframe&#8221; era, they will be &#8220;rediscovered&#8221; and put into a PC and the world will be amazed&#8230;.</p>
<p>Virtualization&#8230;  Been there - done that - 1986</p>
<p> (And we did it so well that the CIA approved our computers to run top level security clearance programs in one virtual mainframe, while potentially hostile code (obtained from inteligence operations) could be run in another virtual mainframe, and the 2 were guaranteed not to be able to interfere with each other&#8230;  Something not even remotely possible on the pathetic PC hardware we are dealing with today.)</p>
]]></content:encoded>
	</item>
</channel>
</rss>
